Using native gates with Cirq
Learn how to use our hardware-native gateset to run a circuit with Cirq
Introduction
Building and submitting circuits using IonQ’s hardware-native gateset enables you to bypass our compiler and optimizer, providing more control and transparency than the default abstract gateset (though often at the cost of performance and convenience).
Before working with native gates in Cirq, we recommend reviewing our guides on Getting Started with Native Gates and Getting Started with Cirq. Native gates are also supported in the IonQ API, Qiskit, and PennyLane.
Building a circuit with native gates
IonQ’s native gates are provided as part of the cirq-ionq
package, including:
GPIGate(phi)
GPI2Gate(phi)
MSGate(phi0, phi1, theta=0.25)
for Aria systems
The ZZ two-qubit gate used on our Forte systems is currently not available in cirq-ionq
. To use this type of native gate, build and submit circuits via the IonQ API or Qiskit.
The native gates can be imported from cirq_ionq.ionq_native_gates
:
For more details about these gate definitions and parameters, refer to the native gates guide.
Native gates are used like other gates when building a circuit:
Note that Cirq also defines an MS gate in cirq.MSGate
, but this gate is not equivalent to the IonQ native gates. To build a circuit in IonQ native gates, make sure you’re using the MS gate imported from cirq_ionq
.
Submitting a circuit with native gates
No changes or special arguments are needed to submit a native gate circuit to a cirq_ionq.Service
—the gateset will be detected automatically.
Transpiling a circuit to native gates
As of November 2024, conversion to native gates using Cirq’s transpiler is supported in the latest pre-release/development version of Cirq. You can install this version with pip install cirq~=1.0.dev
. This capability should be included in the next full release after version 1.4.1.
Start by constructing a circuit using abstract (QIS) gates:
Here’s our basic example circuit:
To convert this circuit to IonQ’s native gates, first import one of IonQ’s native gatesets from cirq_ionq
, then use cirq.optimize_for_target_gateset()
.
The circuit is now a sequence of GPI2, GPI, and MS gates. Note that these gate parameters are also in turns rather than radians (where one turn is 2π radians).
This circuit can be submitted to an IonQ backend (simulator or Aria) as shown above.
Support for transpilation to Forte’s gateset via Cirq is in progress.
Additional resources
Please reach out to [email protected] or the IonQ Slack Community if you have questions about our native gates and transpilation, or if you have requests for additional features and capabilities!
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